Hacker Newsnew | past | comments | ask | show | jobs | submitlogin

For comparison I was trying to nail down what Intel's 7nm process is, but I've found answers between 120nm and 215nm. If anyone knows, that'd be an interesting comparison.


Intel's prior CEO, Brian Krzanich, mentioned that 7-nanometer will have "2.4x the compaction ratio" of 10 nm. This puts the 7-nanometer node at around 202-250 million transistors per square millimeter.

https://en.wikichip.org/wiki/7_nm_lithography_process#P1276


Considering this news:

https://finance.yahoo.com/news/intel-now-ordering-chips-tsmc...

I sincerely doubt Intel will ever disclose it.




Consider applying for YC's Fall 2026 batch! Applications are open till July 27.

Guidelines | FAQ | Lists | API | Security | Legal | Apply to YC | Contact

Search: